Algorithm level recomputing using allocation diversity a register transfer level approach to time redundancy-based concurrent error detection.

In this paper, the authors propose an algorithm-level time redundancy-based concurrent error detection (CED) scheme against permanent and transient faults by exploiting the hardware allocation diversity at the register transfer level. Although the normal computation and the recomputation are carried...

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Bibliografski detalji
Izdano u:IEEE Transactions on computer-aided design of integrated circuits and systems 21, 9 (2002).
Glavni autor: Kaijie Wu
Format: Članak
Jezik:English
Teme: