Algorithm level recomputing using allocation diversity a register transfer level approach to time redundancy-based concurrent error detection.

In this paper, the authors propose an algorithm-level time redundancy-based concurrent error detection (CED) scheme against permanent and transient faults by exploiting the hardware allocation diversity at the register transfer level. Although the normal computation and the recomputation are carried...

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Bibliographic Details

Published in:	IEEE Transactions on computer-aided design of integrated circuits and systems 21, 9 (2002).
Main Author:	Kaijie Wu
Format:	Article
Language:	English
Subjects:	CED capability. Algorithm level recomputing. Area overhead. Hardware allocation diversity. High-level synthesis. Operation-to-operator allocation. Permanent faults. Register transfer level. Register transfer level approach. Time redundancy-based concurrent error detection. Transient faults.