Formulating SoC test scheduling as a network transportation problem.

A formulation of core-based system-on-chip (SoC) test scheduling as a network transportation problem is presented. Given a set of tests, with demands for transportation of test bits (either for test stimuli or test response) and unrelated parallel test resources (e.g., test access mechanisms or buil...

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Vydáno v:IEEE Transactions on computer-aided design of integrated circuits and systems 21, 12 (2002).
Hlavní autor: Koranne, S.
Médium: Článek
Jazyk:English
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