Concurrent error detection schemes for fault-based side-channel cryptanalysis of symmetric block ciphers.

Fault-based side-channel cryptanalysis is very effective against symmetric and asymmetric encryption algorithms. Although straightforward hardware and time redundancy-based concurrent error detection (CED) architectures can be used to thwart such attacks, they entail significant overheads (either ar...

詳細記述

書誌詳細
出版年:	IEEE Transactions on computer-aided design of integrated circuits and systems 21, 12 (2002).
第一著者:	Karri, R.
フォーマット:	論文
言語:	English
主題:	Advanced Encryption Standard finalist 128-bit symmetric encryption algorithms. FPGA implementations. MARS encryption. RC6 symmetric block cipher encryption. Rijndael symmetric block cipher. Serpent block cipher. Algorithm level. Area overhead. Asymmetric encryption algorithms. Concurrent error detection schemes. Decryption. Fault detection latency. Fault-based side-channel cryptanalysis. Inverse relationships. Low-cost low-latency CED techniques. Operation level. Performance penalty. Round level. Symmetric block ciphers. Symmetric encryption algorithms.