Robust Boolean reasoning for equivalence checking and functional property verification.
Many tasks in computer-aided design (CAD), such as equivalence checking, property checking, logic synthesis, and false paths analysis, require efficient Boolean reasoning for problems derived from circuits. Traditionally, canonical representations, e.g., binary decision diagrams (BDDs), or structura...
| Foilsithe in: | IEEE Transactions on computer-aided design of integrated circuits and systems 21, 12 (2002). |
|---|---|
| Príomhchruthaitheoir: | |
| Formáid: | Alt |
| Teanga: | English |
| Ábhair: |