Robust Boolean reasoning for equivalence checking and functional property verification.
Many tasks in computer-aided design (CAD), such as equivalence checking, property checking, logic synthesis, and false paths analysis, require efficient Boolean reasoning for problems derived from circuits. Traditionally, canonical representations, e.g., binary decision diagrams (BDDs), or structura...
| প্রকাশিত: | IEEE Transactions on computer-aided design of integrated circuits and systems 21, 12 (2002). |
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| প্রধান লেখক: | |
| বিন্যাস: | প্রবন্ধ |
| ভাষা: | English |
| বিষয়গুলি: |