Automatic interconnection rectification for SoC design verification based on the port order fault model.

Automatic interconnection rectification for SoC design verification based on the port order fault model.

Embedded cores are being increasingly used in large system-on-a-chip (SoC) designs. The high complexity of SoC designs lead the design verification to be a challenge for system integrators. This paper presents an automatic interconnection rectification (AIR) technique based on the port order fault m...

Volledige beschrijving

Bibliografische gegevens
Gepubliceerd in:IEEE Transactions on computer-aided design of integrated circuits and systems 22, 1 (2003).
Hoofdauteur: Chun-Yao Wang
Formaat: Artikel
Taal:English
Onderwerpen:
SoC designs.
Automatic interconnection rectification.
Combinational benchmarks.
Design verification.
Embedded cores.
Port order fault model.
Sequential benchmarks.
System-on-a-chip designs.