WATSON design space boundary exploration and model generation for analog and RFIC design.

A new method is described which gives the designer access to the design space boundaries of a circuit topology, all with transistor-level accuracy. Using multiobjective genetic optimization, the hypersurface of Pareto-optimal design points is calculated. Tradeoff analysis of competing performances a...

Täydet tiedot

Bibliografiset tiedot
Julkaisussa:IEEE Transactions on computer-aided design of integrated circuits and systems 22, 2 (2003).
Päätekijä: De Smedt, B.
Aineistotyyppi: Artikkeli
Kieli:englanti
Aiheet: