Analyze jitter to improve high-speed design.

The authors describe how, in order to overcome timing jitter-the nemesis of high-speed design engineers-its source must be known. They detail how, to divine its source, thousands of signal observations must be collected and scrutinized to uncover flaws

Λεπτομέρειες βιβλιογραφικής εγγραφής

Τόπος έκδοσης:	IEEE spectrum 37, 7 (2000).
Κύριος συγγραφέας:	Lauterbach, M.
Μορφή:	Άρθρο
Γλώσσα:	English
Θέματα:	Circuit flaws. Design engineers. Design improvement. High-speed circuit design. Jitter source detection. Signal observations. Timing jitter.