A low-power DSP core-based software radio architecture.

This paper describes an approach to developing a low-power digital signal processor (DSP) subsystem architecture for advanced software radio platforms. The architecture is intended to support next-generation wide-band spread-spectrum military waveforms. The methodology illustrates how a next-generat...

Ausführliche Beschreibung

Bibliographische Detailangaben
Veröffentlicht in:	IEEE Journal on selected areas in communications 17, 4 (1999).
1. Verfasser:	Gunn, J.E
Format:	Artikel
Sprache:	English
Schlagworte:	CMOS. DS-SS receivers. DSP circuit-design. DSP core-based software radio architecture. DSP subsystem architecture. RF channel modulation. Air interfaces. Algorithm performance. Application-specific integrated circuit. Commercial waveforms. Gate counts. Low-power digital signal processor. Narrow-band waveforms. Power-consumption estimates. Power-management. Programmable DSP core. Run-time configurable ASIC. Semiconductor technologies. Software radio platforms. Subsystem power consumption minimisation. Transceiver. Wide-band spread-spectrum military waveforms. Wide-band waveforms.