VLSI implementation of a signal recognition and code acquisition algorithm for CDMA packet receivers.

The widespread application of direct-sequence spread-spectrum code division multiple access (DS/SS-CDMA) to wireless communication systems asks for ever faster and more reliable real-time signal processing operations to be performed by highly integrated and low-power consumption digital receivers. O...

詳細記述

書誌詳細
出版年:	IEEE Journal on selected areas in communications 16, 9 (1998).
第一著者:	Fanucci, L.
フォーマット:	論文
言語:	英語
主題:	1.0 micron. ARCNET. ASIC. CMOS technology. ESA. European Space Agency. Ku-band. VLSI implementation. VSAT satellite network. Application-specific integrated-circuit. Code acquisition algorithm. Code division multiple access. Code epoch estimation. Direct-sequence spread-spectrum. Integrated receivers. Low-power consumption digital receivers. Packet DS/SS-CDMA receivers. Parallel acquisition circuit. Real-time signal processing. Signal presence detection. Signal recognition. Terrestrial radio network. Wireless communication systems.