A 56-nm CMOS 99-mm2 8-Gb Multi-Level NAND Flash Memory With 10-MB

A 56-nm CMOS 99-mm2 8-Gb Multi-Level NAND Flash Memory With 10-MB

A single 3.3-V only, 8-Gb NAND flash memory with the smallest chip to date, 98.8 mm2, has been successfully developed. This is the world's first integrated semiconductor chip fabricated with 56-nm CMOS technologies. The effective cell size including the select transistors is 0.0075 mum2 per bit...

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Bibliographic Details
Published in:IEEE Journal of solid state circuits 42, 1 (2007).
Main Author: Takeuchi, K.
Format: Article
Language:English
Subjects:
10 Mbits/s.
3.3 V.
4 kbit.
56 nm.
8 Gbit.
8 kbit.
93 ms.
CMOS technologies.
NAND flash memory.
Binary memories.
High-speed programming.
Integrated semiconductor chip.
Multilevel cell.
Noise cancellation circuits.