Cita APA (7th ed.)

Kim, K. An 8 Gb/s/pin 9.6 ns Row-Cycle 288 Mb Deca-Data Rate SDRAM With an I. IEEE Journal of solid state circuits.

Cita Chicago (17th ed.)

Kim, K.-h. "An 8 Gb/s/pin 9.6 Ns Row-Cycle 288 Mb Deca-Data Rate SDRAM With an I." IEEE Journal of Solid State Circuits .

Cita MLA (9th ed.)

Kim, K.-h. "An 8 Gb/s/pin 9.6 Ns Row-Cycle 288 Mb Deca-Data Rate SDRAM With an I." IEEE Journal of Solid State Circuits, .