A 1 Tb

A 1 Tb

A 1 Tb/s 3 W inter-chip transceiver transmits clock and data by inductive coupling at a clock rate of 1 GHz and data rate of 1 Gb/s per channel. 1024 data transceivers are arranged with a pitch of 30 mum in a layout area of 1 mm2. The total layout area including 16 clock transceivers is 2 mm2 in 0.1...

Ausführliche Beschreibung

Bibliographische Detailangaben
Veröffentlicht in:IEEE Journal of solid state circuits 42, 1 (2007).
1. Verfasser: Miura, N.
Format: Artikel
Sprache:English
Schlagworte:
0.18 micron.
1 GHz.
1 Tbit/s.
3 W.
CMOS integrated circuits.
Bi-phase modulation.
Bit-error rate.
Inductive-coupling transceiver.
Inter-chip transceiver.
Noise immunity.
System-in-package.
Time division multiple access.