APA (7th ed.) Citation

Rusu, S. A 65-nm Dual-Core Multithreaded Xeon® Processor With 16-MB L3 Cache. IEEE Journal of solid state circuits.

Chicago Style (17th ed.) Citation

Rusu, S. "A 65-nm Dual-Core Multithreaded Xeon® Processor With 16-MB L3 Cache." IEEE Journal of Solid State Circuits .

MLA (9th ed.) Citation

Rusu, S. "A 65-nm Dual-Core Multithreaded Xeon® Processor With 16-MB L3 Cache." IEEE Journal of Solid State Circuits, .

Warning: These citations may not always be 100% accurate.