APA (7th ed.) Citation

Churoo Park. A 512-mb DDR3 SDRAM prototype with CIO minimization and self-calibration techniques. IEEE Journal of solid state circuits.

Chicago Style (17th ed.) Citation

Churoo Park. "A 512-mb DDR3 SDRAM Prototype with CIO Minimization and Self-calibration Techniques." IEEE Journal of Solid State Circuits .

MLA (9th ed.) Citation

Churoo Park. "A 512-mb DDR3 SDRAM Prototype with CIO Minimization and Self-calibration Techniques." IEEE Journal of Solid State Circuits, .