A self-tuning DVS processor using delay-error detection and correction.
In this paper, we present a dynamic voltage scaling (DVS) technique called Razor which incorporates an in situ error detection and correction mechanism to recover from timing errors. We also present the implementation details and silicon measurements results of a 64-bit processor fabricated in 0.18-...
| Published in: | IEEE Journal of solid state circuits 41, 4 (2006). |
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| Main Author: | |
| Format: | Article |
| Language: | English |
| Subjects: |