Techniques for phase noise suppression in recirculating DLLs.

This paper presents two techniques for reducing phase noise in recirculating delay-locked loops (DLLs) and extends recently developed theoretical results to optimize the performance of a recirculating DLL prototype CMOS IC incorporating the techniques. One of the techniques reduces 1/f noise in both...

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Bibliographic Details
Published in:IEEE Journal of solid state circuits 39, 8 (2004).
Main Author: Sheng Ye
Format: Article
Language:English
Subjects: