Techniques for phase noise suppression in recirculating DLLs.

This paper presents two techniques for reducing phase noise in recirculating delay-locked loops (DLLs) and extends recently developed theoretical results to optimize the performance of a recirculating DLL prototype CMOS IC incorporating the techniques. One of the techniques reduces 1/f noise in both...

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发表在:	IEEE Journal of solid state circuits 39, 8 (2004).
主要作者:	Sheng Ye
格式:	文件
语言:	English
主题:	1/f noise. CMOS IC. DLL prototype. Frequency synthesizers. Loop filter. Noise memory. Periodic switching. Phase noise reduction. Phase noise suppression. Phase-locked loop. Recirculating delay-locked loops. Transistors. Voltage-controlled oscillator.