A fully integrated 43.2-Gb 4 demux IC in InP HBT technology.

A 43.2-Gb/s clock and data recovery/demultiplexer (CDR/DMUX) integrated circuit (IC) implemented in InP heterojunction bipolar transistor (HBT) technology is demonstrated. The IC is fully integrated, requiring only a single external capacitor for complete functionality. The IC exceeds extrapolated S...

詳細記述

書誌詳細
出版年:	IEEE Journal of solid state circuits 38, 12 (2003).
第一著者:	Nielsen, S.
フォーマット:	論文
言語:	英語
主題:	3.3 V. 3.3 W. 43.2 Gbit/s. HBT technology. PLL loop filter. SONET/SDH specifications. Clock and data recovery. Demultiplexer IC. Extrapolated jitter tolerance specifications. Fully integrated. Optical communication equipment. Optical receiver system. Phase detector. Ring oscillator topology. Single external capacitor.