A 12-bit 75-MS

A 12-bit 75-MS

Precision amplifiers dominate the power dissipation in most high-speed pipelined analog-to-digital converters (ADCs). We propose a digital background calibration technique as an enabling element to replace precision amplifiers by simple power-efficient open-loop stages. In the multibit first stage o...

Täydet tiedot

Bibliografiset tiedot
Julkaisussa:IEEE Journal of solid state circuits 38, 12 (2003).
Päätekijä: Murmann, B.
Aineistotyyppi: Artikkeli
Kieli:English
Aiheet:
0.5 LSB.
0.9 LSB.
12 bit.
12-bit 75-MS/s pipelined ADC.
12-bit 75-MSamples/s proof-of-concept prototype.
3 V.
67 dB.
74 dB.
CMOS analog integrated circuits.
IC consumes 290 mW.
Nyquist input frequencies.
Adaptive systems.
Analog-to-digital conversion.
Differential nonlinearity.
Digital background calibration technique.
High-speed pipelined analog-to-digital converters.
Integral nonlinearity.
Linearization techniques.
Multibit first stage.
Open-loop residue amplification.
Parameter estimation.
Power dissipation.
Power-efficient open-loop stages.
Precision amplifiers.
Residue amplifier power savings.
Signal-to-noise ratio.
Total harmonic distortion.
0.35-μm double-poly quadruple-metal CMOS technology.