A self-controllable voltage level (SVL) circuit and its low-power high-speed CMOS circuit applications.

A self-controllable voltage level (SVL) circuit which can supply a maximum dc voltage to an active-load circuit on request or can decrease the dc voltage supplied to a load circuit in standby mode was developed. This SVL circuit can drastically reduce standby leakage power of CMOS logic circuits wit...

पूर्ण विवरण

ग्रंथसूची विवरण
में प्रकाशित:	IEEE Journal of solid state circuits 38, 7 (2003).
मुख्य लेखक:	Enomoto, T.
स्वरूप:	लेख
भाषा:	English
विषय:	0.13 micron. 285 ps. 512 bit. 69.1 nW. 786 ps. 8 bit. 8.2 nW. CMOS logic circuits. Active-load circuit. Chip area. High-speed CMOS circuit applications. High-speed circuit. Low-power circuit. Memories. Memory-cell array. Output signal delay. Read-access time. Registers. Ripple carry adder. Self-controllable voltage level circuit. Standby leakage power. Standby mode.