Design and performance testing of a 2.29-GB

This contribution describes the design and performance testing of an Advanced Encryption Standard (AES) compliant encryption chip that delivers 2.29 GB/s of encryption throughput at 56 mW of power consumption in a 0.18-μm CMOS standard cell technology. This integrated circuit implements the Rijndael...

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Bibliografski detalji
Izdano u:IEEE Journal of solid state circuits 38, 3 (2003).
Glavni autor: Verbauwhede, I.
Format: Članak
Jezik:English
Teme: