Design techniques and implementation of an 8-bit 200-MS/s interpolating/averaging CMOS A

Design techniques and implementation of an 8-bit 200-MS/s interpolating/averaging CMOS A

The design issues and tradeoffs of a high-speed high-accuracy Nyquist-rate analog-to-digital (A/D) converter are described. The presented design methodology covers the complete flow from specifications to verified layout and is supported by both commercial and internally developed computer-aided des...

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書目詳細資料
發表在:IEEE Journal of solid state circuits 38, 3 (2003).
主要作者: Uyttenhove, K.
格式: Article
語言:English
主題:
0.35 micron.
40 MHz.
655 mW.
8 bit.
8-bit 200-MS/s interpolating/averaging CMOS A/D converter.
Architectural level design.
Circuit level design.
Computer-aided design tools.
Design issues.
Design methodology.
High-speed high-accuracy Nyquist-rate analog-to-digital converter.
Signal-to-noise-plus-distortion ratio.
Total power consumption.
Tradeoffs.
Verified layout.