Timing analysis and simulation for signal integrity engineers

Timing analysis and simulation for signal integrity engineers

Xehetasun bibliografikoak
Egile nagusia: Edlund, Greg
Formatua: Liburua
Hizkuntza:English
Argitaratua: Upper Saddle River, N.J. Prentice Hall c2008.
Gaiak:
Timing circuits > Design and construction.
Digital electronics > Design and construction.
Signal processing > Digital techniques.
Sarrera elektronikoa:Table of contents only