Multi-gigabit-rate clock and data recovery based on blind oversampling.

Multi-gigabit-rate clock and data recovery based on blind oversampling.

This article addresses issues with designing a blind oversampling clock and data recovery unit (CDR) that meets jitter tolerance specifications. Asymptotic limits on jitter tolerance are derived assuming ideal phase detection based on a priori statistics of the received signal, proving that the coar...

Täydet tiedot

Bibliografiset tiedot
Julkaisussa:IEEE Communications magazine 41, 12 (2003).
Päätekijä: Kim, Jaeha
Aineistotyyppi: Artikkeli
Kieli:English
Aiheet:
CDR.
A priori statistics.
Blind oversampling.
Coarse timing resolution.
Discrete samples.
Hardware costs.
Ideal phase detection.
Jitter tolerance specifications.
Multigigabit-rate clock/data recovery.
Phase detection algorithm.
Statistical simulation methodology.