Network on a chip modeling wireless networks with asynchronous VLSI.
We introduce the notion of a network on a chip: a programmable asynchronous VLSI architecture for fast and efficient simulation of wireless networks. The approach is inspired by the remarkable similarity between networks and asynchronous VLSI. Our approach results in simulators that can evaluate net...
发表在: | IEEE Communications magazine 39, 11 (2001). |
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主要作者: | |
格式: | 文件 |
语言: | English |
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