Cita APA (7th ed.)

Castro, J. L., Lomibao, L. T., Santos, A. P. P. C., & Tolledo, M. N. T. Implementation of a 32-bit dual core ARM7 microprocessor with single level cache.

Cita Chicago (17th ed.)

Castro, Janelle Legaspi, Love Tulagan Lomibao, Aaron Peter Paul Catuncan Santos, i Mark Neptaly Timajo Tolledo. Implementation of a 32-bit Dual Core ARM7 Microprocessor with Single Level Cache. 2008.

Cita MLA (9th ed.)

Castro, Janelle Legaspi, et al. Implementation of a 32-bit Dual Core ARM7 Microprocessor with Single Level Cache.