APA (7th ed.) Citation

Castro, J. L., Lomibao, L. T., Santos, A. P. P. C., & Tolledo, M. N. T. Implementation of a 32-bit dual core ARM7 microprocessor with single level cache.

Chicago Style (17th ed.) Citation

Castro, Janelle Legaspi, Love Tulagan Lomibao, Aaron Peter Paul Catuncan Santos, and Mark Neptaly Timajo Tolledo. Implementation of a 32-bit Dual Core ARM7 Microprocessor with Single Level Cache. 2008.

MLA (9th ed.) Citation

Castro, Janelle Legaspi, et al. Implementation of a 32-bit Dual Core ARM7 Microprocessor with Single Level Cache.