Cita APA (7th ed.)

Reyes, J. A. P. (2005). A study of floating-point architectures for pipelined RISC processors.

Cita Chicago (17th ed.)

Reyes, Joy Alinda P. A Study of Floating-point Architectures for Pipelined RISC Processors. 2005.

Cita MLA (9th ed.)

Reyes, Joy Alinda P. A Study of Floating-point Architectures for Pipelined RISC Processors. 2005.