Reyes, J. A. P. (2005). A study of floating-point architectures for pipelined RISC processors.
Chicago Style (17th ed.) CitationReyes, Joy Alinda P. A Study of Floating-point Architectures for Pipelined RISC Processors. 2005.
MLA (9th ed.) CitationReyes, Joy Alinda P. A Study of Floating-point Architectures for Pipelined RISC Processors. 2005.
Warning: These citations may not always be 100% accurate.