Design and implementation of a 32-Bit dual core capable DLX microprocessor with single-level cache
To meet the demands for faster computers, engineers developed techniques to increase computer speeds and throughput. Included in these solutions are the use of cache and multiple cores. The first solution uses the concept of locality of reference to minimize the delay caused by accessing slower memo...
| Autor principal: | |
|---|---|
| Outros Autores: | , , |
| Formato: | Tese |
| Idioma: | English |
| Publicado em: |
2007.
|
| Assuntos: |