Design and implementation of a 32-Bit dual core capable DLX microprocessor with single-level cache

To meet the demands for faster computers, engineers developed techniques to increase computer speeds and throughput. Included in these solutions are the use of cache and multiple cores. The first solution uses the concept of locality of reference to minimize the delay caused by accessing slower memo...

Täydet tiedot

Bibliografiset tiedot
Päätekijä: Dioquino, Darryl Aldrin M.
Muut tekijät: Rosario, Katrina Joy S., Supe, Homer F., Zarsuela, Jestoni V.
Aineistotyyppi: Opinnäyte
Kieli:English
Julkaistu: 2007.
Aiheet: