A study of data transfer mechanisms in a RISC microprocessor augmented with a tightly coupled reconfigurable processing element (RPE)
This thesis investigates the characteristics and effects of two different data transfer mechanisms between a reduced instruction set (RISC) microprocessor and its attached reconfigurable processing element (RPE). Performance metrics and data transfer characteristics such as throughput and communicat...
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| フォーマット: | 学位論文 |
| 言語: | English |
| 出版事項: |
2002.
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