Digital timing macromodeling for VLSI design verification

Digital timing macromodeling for VLSI design verification

Détails bibliographiques
Auteur principal: Kong, Jeong-Taek 1959-
Autres auteurs: Overhauser, David 1961-
Format: Livre
Langue:English
Publié: Boston Kluwer Academic c1995.
Collection:The Kluwer international series in enginering and computer science SECS 319
Sujets:
Integrated circuits > Very large scale integration > Design and construction > Data processing.
Integrated circuits > Verification > Data processing.
Computer-aided design.