Uyemura, J. P. (2006). Chip design for submicron vlsi: Cmos layout and simulation. Thomson.
Chicago Style (17th ed.) CitationUyemura, John Paul. Chip Design for Submicron Vlsi: Cmos Layout and Simulation. Australia: Thomson, 2006.
MLA (9th ed.) CitationUyemura, John Paul. Chip Design for Submicron Vlsi: Cmos Layout and Simulation. Thomson, 2006.
Warning: These citations may not always be 100% accurate.