Tutorial test generation for VLSI chips

Tutorial test generation for VLSI chips

Xehetasun bibliografikoak
Erakunde egilea: IEEE Computer Society
Beste egile batzuk: Agrawal, Vishwani D. 1943-, Seth, Sharad C.
Formatua: Liburua
Hizkuntza:English
Argitaratua: Washington, D.C., Los Angeles, CA Computer Society Press Order from Computer Society c1988.
Gaiak:
Integrated circuits > Very large scale integration > Testing.
Automatic test equipment.