Kết quả tìm kiếm - "Timing analysis."

1

Phase-time analysis of the leakage impulse current of faulty line-post pin insulators. Bằng Kim, C.J

Xuất bản năm IEEE Transactions on power delivery

Bài viết

Phase-time analysis of the leakage impulse current of faulty line-post pin insulators.

2

Impact of on-chip interconnect frequency-dependent R(f)L(f) on digital and RF design. Bằng Yu Cao

Xuất bản năm IEEE Transactions on VLSI systems

Bài viết

Impact of on-chip interconnect frequency-dependent R(f)L(f) on digital and RF design.

3

Designing an asynchronous microcontroller using Pipefitter. Bằng Blunno, I.

Xuất bản năm IEEE Transactions on VLSI systems

Bài viết

Designing an asynchronous microcontroller using Pipefitter.

4

Modeling subthreshold SOI logic for static timing analysis. Bằng Valentian, A.

Xuất bản năm IEEE Transactions on VLSI systems

Bài viết

Modeling subthreshold SOI logic for static timing analysis.

5

Loop-based interconnect modeling and optimization approach for multigigahertz clock network design. Bằng Xuejue Huang

Xuất bản năm IEEE Journal of solid state circuits

Bài viết

Loop-based interconnect modeling and optimization approach for multigigahertz clock network design.

6

Efficient asynchronous bundled-data pipelines for DCT matrix-vector multiplication. Bằng Tugsinavisut, S.

Xuất bản năm IEEE Transactions on VLSI systems

Bài viết

Efficient asynchronous bundled-data pipelines for DCT matrix-vector multiplication.

7

Compositional schedulability analysis of real-time systems using time Petri nets. Bằng Dianxiang Xu

Xuất bản năm IEEE Transactions on software engineering

Bài viết

Compositional schedulability analysis of real-time systems using time Petri nets.

8

Timing constraints for domino logic gates with timing-dependent keepers. Bằng Seong-Ook Jung

Xuất bản năm IEEE Transactions on computer-aided design of integrated circuits and systems

Bài viết

Timing constraints for domino logic gates with timing-dependent keepers.

9

Pattern generation for delay testing and dynamic timing analysis considering power-supply noise effects. Bằng Krstic, A.

Xuất bản năm IEEE Transactions on computer-aided design of integrated circuits and systems

Bài viết

Pattern generation for delay testing and dynamic timing analysis considering power-supply noise effects.

10

Linearization of the timing analysis and optimization of level-sensitive digital synchronous circuits. Bằng Taskin, B.

Xuất bản năm IEEE Transactions on VLSI systems

Bài viết

Phase-time analysis of the leakage impulse current of faulty line-post pin insulators. Bằng Kim, C.J

Impact of on-chip interconnect frequency-dependent R(f)L(f) on digital and RF design. Bằng Yu Cao

Designing an asynchronous microcontroller using Pipefitter. Bằng Blunno, I.

Modeling subthreshold SOI logic for static timing analysis. Bằng Valentian, A.

Loop-based interconnect modeling and optimization approach for multigigahertz clock network design. Bằng Xuejue Huang

Efficient asynchronous bundled-data pipelines for DCT matrix-vector multiplication. Bằng Tugsinavisut, S.

Compositional schedulability analysis of real-time systems using time Petri nets. Bằng Dianxiang Xu

Timing constraints for domino logic gates with timing-dependent keepers. Bằng Seong-Ook Jung

Pattern generation for delay testing and dynamic timing analysis considering power-supply noise effects. Bằng Krstic, A.

Linearization of the timing analysis and optimization of level-sensitive digital synchronous circuits. Bằng Taskin, B.

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