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2171
Self-reset logic for fast arithmetic applications.
Опубликовано в: IEEE Transactions on VLSI systemsСтатья -
2172
-
2173
POMR a power-aware interconnect optimization methodology.
Опубликовано в: IEEE Transactions on VLSI systemsСтатья -
2174
-
2175
-
2176
Design of a 3-D fully depleted SOI computational RAM.
Опубликовано в: IEEE Transactions on VLSI systemsСтатья -
2177
Shielding effect of on-chip interconnect inductance.
Опубликовано в: IEEE Transactions on VLSI systemsСтатья -
2178
-
2179
-
2180
Design of wireless on-wafer submicron characterization system.
Опубликовано в: IEEE Transactions on VLSI systemsСтатья