-
6651
Design of a 3-D fully depleted SOI computational RAM.
Published in IEEE Transactions on VLSI systemsArticle -
6652
-
6653
Low-power scan design using first-level supply gating.
Published in IEEE Transactions on VLSI systemsArticle -
6654
-
6655
-
6656
-
6657
-
6658
-
6659
-
6660