Zoekresultaten - "Testing."

6651

Design of a 3-D fully depleted SOI computational RAM. door Koob, J.C

Gepubliceerd in IEEE Transactions on VLSI systems

Artikel

Design of a 3-D fully depleted SOI computational RAM.

6652

Analytical test buffer design for differential signaling I door Sanghyeon Baeg

Gepubliceerd in IEEE Transactions on VLSI systems

Artikel

Analytical test buffer design for differential signaling I

6653

Low-power scan design using first-level supply gating. door Bhunia, S.

Gepubliceerd in IEEE Transactions on VLSI systems

Artikel

Low-power scan design using first-level supply gating.

6654

Design of wireless on-wafer submicron characterization system. door Moore, B.

Gepubliceerd in IEEE Transactions on VLSI systems

Artikel

Design of wireless on-wafer submicron characterization system.

6655

Optimum control limits for employing statistical process control in software process. door Jalote, P.

Gepubliceerd in IEEE Transactions on software engineering

Artikel

Optimum control limits for employing statistical process control in software process.

6656

Testing homogeneous spreadsheet grids with the "what you see is what you test" methodology. door Burnett, M.

Gepubliceerd in IEEE Transactions on software engineering

Artikel

Testing homogeneous spreadsheet grids with the "what you see is what you test" methodology.

6657

Two controlled experiments assessing the usefulness of design pattern documentation in program maintenance. door Prechelt, L.

Gepubliceerd in IEEE Transactions on software engineering

Artikel

Two controlled experiments assessing the usefulness of design pattern documentation in program maintenance.

6658

Double sampling data checking technique an online testing solution for multisource noise-induced errors on on-chip interconnects and buses. door Yi Zhao

Gepubliceerd in IEEE Transactions on VLSI systems

Artikel

Double sampling data checking technique an online testing solution for multisource noise-induced errors on on-chip interconnects and buses.

6659

Design of concurrent test Hardware for Linear analog circuits with constrained hardware overhead. door Ozev, S.

Gepubliceerd in IEEE Transactions on VLSI systems

Artikel

Design of concurrent test Hardware for Linear analog circuits with constrained hardware overhead.

6660

Test data compression technique for embedded cores using virtual scan chains. door Jas, A.

Gepubliceerd in IEEE Transactions on VLSI systems

Artikel

Design of a 3-D fully depleted SOI computational RAM. door Koob, J.C

Analytical test buffer design for differential signaling I door Sanghyeon Baeg

Low-power scan design using first-level supply gating. door Bhunia, S.

Design of wireless on-wafer submicron characterization system. door Moore, B.

Optimum control limits for employing statistical process control in software process. door Jalote, P.

Testing homogeneous spreadsheet grids with the "what you see is what you test" methodology. door Burnett, M.

Two controlled experiments assessing the usefulness of design pattern documentation in program maintenance. door Prechelt, L.

Double sampling data checking technique an online testing solution for multisource noise-induced errors on on-chip interconnects and buses. door Yi Zhao

Design of concurrent test Hardware for Linear analog circuits with constrained hardware overhead. door Ozev, S.

Test data compression technique for embedded cores using virtual scan chains. door Jas, A.

Zoekinstrumenten:

Verfijn jouw resultaten

CAMPUS

DATABASE

UNIT LIBRARY

YEAR OF PUBLICATION

CLASSIFICATION

SUBJECT

AUTHOR

RESOURCE TYPE

LANGUAGE