Näytetään 1 - 7 yhteensä 7 tuloksesta haulle '"Test application."', hakuaika: 0,02s Tarkenna hakua
  1. 1

    A unified approach to reduce SOC test data volume, scan power and testing time. Tekijä Chandra, A.

    Artikkeli

    A unified approach to reduce SOC test data volume, scan power and testing time.
  2. 2

    Test pattern generation and clock disabling for simultaneous test time and power reduction. Tekijä Jih-Jeen Chen

    Artikkeli

    Test pattern generation and clock disabling for simultaneous test time and power reduction.
  3. 3

    Nine-coded compression technique for testing embedded cores in SoCs. Tekijä Tehranipoor, M.

    Artikkeli

    Nine-coded compression technique for testing embedded cores in SoCs.
  4. 4

    Testing ASICs with multiple identical cores. Tekijä Yuejian Wu

    Artikkeli

    Testing ASICs with multiple identical cores.
  5. 5

    On the use of random limited-scan to improve at-speed random pattern testing of scan circuits. Tekijä Pomeranz, I.

    Artikkeli

    On the use of random limited-scan to improve at-speed random pattern testing of scan circuits.
  6. 6

    Software-based self-testing methodology for processor cores. Tekijä Li Chen

    Artikkeli

    Software-based self-testing methodology for processor cores.
  7. 7

    Testing of core-based systems-on-a-chip. Tekijä Ravi, S.

    Artikkeli

    Testing of core-based systems-on-a-chip.

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