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An architecture and compiler for scalable on-chip communication.
I publikationen IEEE Transactions on VLSI systemsArtikel -
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GALDS a complete framework for designing multiclock ASICs and SoCs.
I publikationen IEEE Transactions on VLSI systemsArtikel -
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Global interconnect design in a three-dimensional system-on-a-chip.
I publikationen IEEE Transactions on VLSI systemsArtikel