Showing 1 - 9 results of 9 for search '"Switching activities."', query time: 0.02s Refine Results
  1. 1

    A unified approach to reduce SOC test data volume, scan power and testing time. by Chandra, A.

    Article

    A unified approach to reduce SOC test data volume, scan power and testing time.
  2. 2

    Lowering power consumption in concurrent checkers via input ordering. by Mohanram, K.

    Article

    Lowering power consumption in concurrent checkers via input ordering.
  3. 3

    Power estimation techniques for FPGAs. by Anderson, J.H

    Article

    Power estimation techniques for FPGAs.
  4. 4

    Low-power instruction bus encoding for embedded processors. by Petrov, P.

    Article

    Low-power instruction bus encoding for embedded processors.
  5. 5

    High-performance and low-power conditional discharge flip-flop. by Peiyi Zhao

    Article

    High-performance and low-power conditional discharge flip-flop.
  6. 6

    Engineering a more accessible world. by Simpson, R.C

    Article

    Engineering a more accessible world.
  7. 7

    Cascaded Bayesian inferencing for switching activity estimation with correlated inputs. by Bhanja, S.

    Article

    Cascaded Bayesian inferencing for switching activity estimation with correlated inputs.
  8. 8

    Unification of scheduling, binding, and retiming to reduce power consumption under timings and resources constraints. by Chabini, N.

    Article

    Unification of scheduling, binding, and retiming to reduce power consumption under timings and resources constraints.
  9. 9

    Parallel high-throughput limited search trellis decoder VLSI design. by Fei Sun

    Article

    Parallel high-throughput limited search trellis decoder VLSI design.

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