Отображение 101 - 110 результаты of 119 для поиска '"Si:As."', время запроса: 0.02сек. Отмена результатов
  1. 101

    A jitter characterization system using a component-invariant Vernier delay line. по Chan, A.H

    Опубликовано в: IEEE Transactions on VLSI systems
    Статья

    A jitter characterization system using a component-invariant Vernier delay line.
  2. 102

    A simplified model for the effect of interfinger metal on maximum temperature rise in a multifinger bipolar transistor. по Walkey, D.J

    Статья

    A simplified model for the effect of interfinger metal on maximum temperature rise in a multifinger bipolar transistor.
  3. 103

    Scaling of strained-Si n-MOSFETs into the ballistic regime and associated anisotropic effects. по Bufler, F.M

    Опубликовано в: IEEE Transactions on electron devices
    Статья

    Scaling of strained-Si n-MOSFETs into the ballistic regime and associated anisotropic effects.
  4. 104

    Monte Carlo simulation and measurement of nanoscale n-MOSFETs. по Bufler, F.M

    Опубликовано в: IEEE Transactions on electron devices
    Статья

    Monte Carlo simulation and measurement of nanoscale n-MOSFETs.
  5. 105

    Effect of band alignment and density of states on the collector current in p-Si/n-Si1-yCy по Singh, D.V

    Опубликовано в: IEEE Transactions on electron devices
    Статья

    Effect of band alignment and density of states on the collector current in p-Si/n-Si1-yCy
  6. 106

    Impact of interfacial layer and transition region on gate current performance for high-K gate dielectric stack its tradeoff with gate capacitance. по Yang-Yu Fan

    Опубликовано в: IEEE Transactions on electron devices
    Статья

    Impact of interfacial layer and transition region on gate current performance for high-K gate dielectric stack its tradeoff with gate capacitance.
  7. 107

    Development of high-current 4H-SiC ACCUFET. по Singh, R.

    Опубликовано в: IEEE Transactions on electron devices
    Статья

    Development of high-current 4H-SiC ACCUFET.
  8. 108

    Modeling of the bulk versus SOI CMOS performances for the optimal design of APS circuits in low-power low-voltage applications. по Afzalian, A.

    Опубликовано в: IEEE Transactions on electron devices
    Статья

    Modeling of the bulk versus SOI CMOS performances for the optimal design of APS circuits in low-power low-voltage applications.
  9. 109

    Amorphous silicon active pixel sensor readout circuit for digital imaging. по Karim, K.S

    Опубликовано в: IEEE Transactions on electron devices
    Статья

    Amorphous silicon active pixel sensor readout circuit for digital imaging.
  10. 110

    Two-dimensional monolithic lead chalcogenide infrared sensor arrays on silicon read-out chips and noise mechanisms. по Zogg, H.

    Опубликовано в: IEEE Transactions on electron devices
    Статья

    Two-dimensional monolithic lead chalcogenide infrared sensor arrays on silicon read-out chips and noise mechanisms.

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