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The boundary-scan handbook
by
Parker, Kenneth P.
Published 2016
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The Test access port and boundary scan architecture
Published 1990
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A unified approach to reduce SOC test data volume, scan power and testing time.
by
Chandra, A.
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IEEE Transactions on computer-aided design of integrated circuits and systems
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Test pattern generation and partial-scan methodology for an asynchronous SoC interconnect.
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Efthymiou, A.
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IEEE Transactions on VLSI systems
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College of Engineering Library II
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