-
631
-
632
-
633
Design of a 3-D fully depleted SOI computational RAM.
Published in IEEE Transactions on VLSI systemsArticle -
634
Low-power scan design using first-level supply gating.
Published in IEEE Transactions on VLSI systemsArticle -
635
Shielding effect of on-chip interconnect inductance.
Published in IEEE Transactions on VLSI systemsArticle -
636
-
637
-
638
-
639
-
640