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Low-power on-chip communication based on transition-aware global signaling (TAGS).
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Kaul, H.
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IEEE Transactions on VLSI systems
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Scaling trends of on-chip power distribution noise.
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Mezhiba, A.V
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Enhancing microprocessor immunity to power supply noise with clock-data compensation.
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Wong, K.L
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IEEE Journal of solid state circuits
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An efficient merging scheme for prescribed skew clock routing.
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Chaturvedi, R.
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Pattern generation for delay testing and dynamic timing analysis considering power-supply noise effects.
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Krstic, A.
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IEEE Transactions on computer-aided design of integrated circuits and systems
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DATABASE
Union Catalog (Buklod)
5 results
5
AUTHOR
Chaturvedi, R.
1 results
1
Kaul, H.
1 results
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Krstic, A.
1 results
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Mezhiba, A.V
1 results
1
Wong, K.L
1 results
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RESOURCE TYPE
Article
5 results
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LANGUAGE
English
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