Showing 1 - 10 results of 24 for search '"Power reduction."', זמן שאילתה: 0.02s Refine Results
  1. 1

    The practical engineer [IC design, power reduction]. מאת Frenkil, J.

    הוצא לאור ב IEEE spectrum
    Article

    The practical engineer [IC design, power reduction].
  2. 2

    A unified approach to reduce SOC test data volume, scan power and testing time. מאת Chandra, A.

    Article

    A unified approach to reduce SOC test data volume, scan power and testing time.
  3. 3

    Characterization and modeling of run-time techniques for leakage power reduction. מאת Yuh-Fang Tsai

    הוצא לאור ב IEEE Transactions on VLSI systems
    Article

    Characterization and modeling of run-time techniques for leakage power reduction.
  4. 4

    Distributed sleep transistor network for power reduction. מאת Changbo Long

    הוצא לאור ב IEEE Transactions on VLSI systems
    Article

    Distributed sleep transistor network for power reduction.
  5. 5

    Zero-aware asymmetric SRAM cell for reducing cache power in writing zero. מאת Yen-Jen Chang

    הוצא לאור ב IEEE Transactions on VLSI systems
    Article

    Zero-aware asymmetric SRAM cell for reducing cache power in writing zero.
  6. 6

    DLS dynamic backlight luminance scaling of liquid crystal display. מאת Naehyuck Chang

    הוצא לאור ב IEEE Transactions on VLSI systems
    Article

    DLS dynamic backlight luminance scaling of liquid crystal display.
  7. 7

    DCG deterministic clock-gating for low-power microprocessor design. מאת Hai Li

    הוצא לאור ב IEEE Transactions on VLSI systems
    Article

    DCG deterministic clock-gating for low-power microprocessor design.
  8. 8

    A study of cache sub-ranking and block buffering as power reduction techniques for multiprocessor cache design מאת Zarsuela, Jestoni V.

    Thesis

    A study of cache sub-ranking and block buffering as power reduction techniques for multiprocessor cache design
  9. 9

    Design and analysis of spatial encoding circuits for peak power reduction in on-chip buses. מאת Kaul, H.

    הוצא לאור ב IEEE Transactions on VLSI systems
    Article

    Design and analysis of spatial encoding circuits for peak power reduction in on-chip buses.
  10. 10

    A 125 μW , Fully Scalable MPEG-2 and H.264 מאת Liu, T.-M

    Article

    A 125 μW , Fully Scalable MPEG-2 and H.264

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