Erakusten 2.631 - 2.640 emaitzak -- 3.028 bilaketa honetara '"Performance"', Bilaketaren denbora: 0,03s Findu emaitzak
  1. 2631

    Evaluating the performance of turbo codes and turbo-coded modulation in a DS-CDMA environment. nork Kuhn, V.

    Artikulua

    Evaluating the performance of turbo codes and turbo-coded modulation in a DS-CDMA environment.
  2. 2632

    New nonlinear algorithms for narrowband interference suppression in CDMA spread-spectrum systems. nork Kun-Jie Wang

    Artikulua

    New nonlinear algorithms for narrowband interference suppression in CDMA spread-spectrum systems.
  3. 2633

    Dynamic control of a fixed pattern rectifier. nork Ghijselen, J.A.L

    Artikulua

    Dynamic control of a fixed pattern rectifier.
  4. 2634

    On the application of high performance computation techniques to nonlinear interior point methods. nork Castronuovo, E.D

    Artikulua

    On the application of high performance computation techniques to nonlinear interior point methods.
  5. 2635

    A Case Study Power and Performance Improvement of a Chip Multiprocessor for Transaction Processing. nork Ando, H.

    Argitaratua izan da IEEE Transactions on VLSI systems
    Artikulua

    A Case Study Power and Performance Improvement of a Chip Multiprocessor for Transaction Processing.
  6. 2636

    A review of 0.18-μm full adder performances for tree structured arithmetic circuits. nork Chip-Hong Chang

    Argitaratua izan da IEEE Transactions on VLSI systems
    Artikulua

    A review of 0.18-μm full adder performances for tree structured arithmetic circuits.
  7. 2637

    An efficient merging scheme for prescribed skew clock routing. nork Chaturvedi, R.

    Argitaratua izan da IEEE Transactions on VLSI systems
    Artikulua

    An efficient merging scheme for prescribed skew clock routing.
  8. 2638

    Analysis of load frequency control performance assessment criteria. nork Gross, G.

    Artikulua

    Analysis of load frequency control performance assessment criteria.
  9. 2639

    Parallel interleaver design and VLSI architecture for low-latency MAP turbo decoders. nork Dobkin, R.

    Argitaratua izan da IEEE Transactions on VLSI systems
    Artikulua

    Parallel interleaver design and VLSI architecture for low-latency MAP turbo decoders.
  10. 2640

    VLSI architectural design tradeoffs for sliding-window log-MAP decoders. nork Chien-Ming Wu

    Argitaratua izan da IEEE Transactions on VLSI systems
    Artikulua

    VLSI architectural design tradeoffs for sliding-window log-MAP decoders.

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