Gösterilen 1,511 - 1,520 sonuçlar arası kayıtlar. 1,707 sonuç. Aranan kelime '"Ordering."', Sorgu süresi: 0.02s Sonuçları Daraltın
  1. 1511

    SMAQ a measurement-based tool for traffic modeling and queuing analysis. I. Design methodologies and software architecture. Yazar: Li, San-Qi

    Makale

    SMAQ a measurement-based tool for traffic modeling and queuing analysis. I. Design methodologies and software architecture.
  2. 1512

    Global sliding-mode control. Improved design for a brushless DC motor. Yazar: Hyeung-Sik Choi

    Makale

    Global sliding-mode control. Improved design for a brushless DC motor.
  3. 1513

    Nonstationarities of postural sway. Yazar: Loughlin, P.J

    Makale

    Nonstationarities of postural sway.
  4. 1514

    A single-chip tuner for DVB-T. Yazar: Dawkins, M.

    Makale

    A single-chip tuner for DVB-T.
  5. 1515

    Low-voltage high-speed switched-capacitor circuits without voltage bootstrapper. Yazar: Lei Wang

    Makale

    Low-voltage high-speed switched-capacitor circuits without voltage bootstrapper.
  6. 1516

    A 114-dB 68-mW Chopper-stabilized stereo multibit audio ADC in 5.62 mm2. Yazar: YuQing Yang

    Makale

    A 114-dB 68-mW Chopper-stabilized stereo multibit audio ADC in 5.62 mm2.
  7. 1517

    A second-order semidigital clock recovery circuit based on injection locking. Yazar: Hiok-Tiaq Ng

    Makale

    A second-order semidigital clock recovery circuit based on injection locking.
  8. 1518

    Second-order intermodulation mechanisms in CMOS downconverters. Yazar: Manstretta, D.

    Makale

    Second-order intermodulation mechanisms in CMOS downconverters.
  9. 1519

    A 1-V transformer-feedback low-noise amplifier for 5-GHz wireless LAN in 0.18-μm CMOS. Yazar: Cassan, D.J

    Makale

    A 1-V transformer-feedback low-noise amplifier for 5-GHz wireless LAN in 0.18-μm CMOS.
  10. 1520

    Process and circuit design interlock for application-dependent scaling tradeoffs and optimization in the SoC era. Yazar: Diaz, C.H

    Makale

    Process and circuit design interlock for application-dependent scaling tradeoffs and optimization in the SoC era.

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