Εμφανίζονται 821 - 830 Αποτελέσματα από 1.113 για την αναζήτηση '"Optimization."', χρόνος αναζήτησης: 0,02δλ Περιορισμός αποτελεσμάτων
  1. 821

    Fitted Elmore delay a simple and accurate interconnect delay model. ανά Abou-Seido, A.I

    Τόπος έκδοσης IEEE Transactions on VLSI systems
    Άρθρο

    Fitted Elmore delay a simple and accurate interconnect delay model.
  2. 822

    Designing an asynchronous microcontroller using Pipefitter. ανά Blunno, I.

    Τόπος έκδοσης IEEE Transactions on VLSI systems
    Άρθρο

    Designing an asynchronous microcontroller using Pipefitter.
  3. 823

    Low-power on-chip communication based on transition-aware global signaling (TAGS). ανά Kaul, H.

    Τόπος έκδοσης IEEE Transactions on VLSI systems
    Άρθρο

    Low-power on-chip communication based on transition-aware global signaling (TAGS).
  4. 824

    Systematic IEEE rounding method for high-speed floating-point multipliers. ανά Quach, N.T

    Τόπος έκδοσης IEEE Transactions on VLSI systems
    Άρθρο

    Systematic IEEE rounding method for high-speed floating-point multipliers.
  5. 825

    Analysis of feedback cancellation in hearing aids with Filtered-x LMS and the direct method of closed loop identification. ανά Hellgren, J.

    Άρθρο

    Analysis of feedback cancellation in hearing aids with Filtered-x LMS and the direct method of closed loop identification.
  6. 826

    Power-delay product minimization in high-performance 64-bit carry-select adders. ανά Neve, A.

    Τόπος έκδοσης IEEE Transactions on VLSI systems
    Άρθρο

    Power-delay product minimization in high-performance 64-bit carry-select adders.
  7. 827

    Memory-access-aware data structure transformations for embedded software with dynamic data accesses. ανά Daylight, E.G

    Τόπος έκδοσης IEEE Transactions on VLSI systems
    Άρθρο

    Memory-access-aware data structure transformations for embedded software with dynamic data accesses.
  8. 828

    Compiler-directed scratch pad memory optimization for embedded multiprocessors. ανά Kandemir, M.

    Τόπος έκδοσης IEEE Transactions on VLSI systems
    Άρθρο

    Compiler-directed scratch pad memory optimization for embedded multiprocessors.
  9. 829

    Fixed-outline floorplanning enabling hierarchical design. ανά Adya, S.N

    Τόπος έκδοσης IEEE Transactions on VLSI systems
    Άρθρο

    Fixed-outline floorplanning enabling hierarchical design.
  10. 830

    A clock interconnect extractor for multigigahertz frequencies incorporating inductance effect. ανά Azadpour, M.A

    Τόπος έκδοσης IEEE Transactions on VLSI systems
    Άρθρο

    A clock interconnect extractor for multigigahertz frequencies incorporating inductance effect.

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